Microarchitectural Resource Management Issues on Multicore NUMA Systems

Modern computer systems make use of multiple cores and NUMA (Non Uniform Memory Access) architecture. Since multiple cores share various microarchitectural resources such as LLC (Last Level Cache), memory interface and interconnect, contentions on these resources become a serious performance bottleneck. In this paper, we explore research issues how to manage these resources to mitigate such contentions. We first examine the internal structure of a multicore NUMA system and investigate interference among cores during memory accesses. Then, we discuss several existing microarchitectural resource management schemes such as cache partitioning, page placement, task scheduling and virtual machine migration. In addition, we inspect diverse application classification techniques including animal, color, and application slowdown model that analyze the interactions among applications on microarchitectural resources. Finally, we present our observations about how an application affects or being affected by other applications in terms of influentiality and sensitivity.